Middle - Out Reasoning for LogicProgram
نویسندگان
چکیده
We propose a novel approach to automating the synthesis of logic programs: Logic programs are synthesized as a by-product of the planning of a veriication proof. The approach is a two-level one: At the object level, we prove program veriication conjectures in a sorted, rst-order theory. The conjectures are of the form 8args ????! : prog(args ????!) $ spec(args ????!). At the meta-level, we plan the object-level veriication with an unspeciied program deenition. The deenition is represented with a (second-order) meta-level variable, which becomes instantiated in the course of the planning.
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